About SLM
SLM is a compute infrastructure company building supercapability systems. We're developing new classes of high-performance architectures that deliver advanced performance, precision, and physical resilience in environments conditioned by hard physics. Many of our operating conditions are where conventional computing fails: harsh environments orders of magnitude beyond what commercial electronics are designed for, temperature extremes, and reliability requirements that make every device physics decision critical.
Our systems need to survive and perform in particle radiation fields that cause ionization damage, displacement damage, and single-event effects in rapid succession. Incremental hardening of existing designs proves incompatible in our system’s operating settings, and we have to have robust understanding of device behavior at the physics level and build from that foundation. We're working at advanced process nodes where response to harsh physical conditions isn't fully characterized, integrating specialized memory technologies with complex radiation sensitivities, and validating everything through comprehensive test campaigns before deployment in environments where failure isn't recoverable.
Our principal capabilities have been specified and designed over three years of applied R&D, and we're now building production systems for scientific instrumentation with deployment deadlines measured in months instead of years. You'll work on device-level challenges that determine the entire system’s operational success across performance and reliability in extreme environments.
About this role
You'll develop and optimize high electron mobility transistor (HEMT) structures using wide-bandgap materials — primarily gallium nitride (GaN) and potentially aluminum nitride (AlN) or other III-N systems — that deliver the performance and reliability our extreme environment applications demand.
This means designing HEMT heterostructures that maximize electron mobility while maintaining stability across extreme temperature ranges, developing ohmic and Schottky contact metallizations that remain stable under radiation exposure and thermal cycling, optimizing barrier layer compositions and thicknesses for target threshold voltages and breakdown characteristics, and implementing passivation strategies that minimize surface states and leakage paths. You'll work at the intersection of materials science, solid-state physics, and device engineering; understanding how epitaxial structure affects two-dimensional electron gas (2DEG) properties, how contact metallurgy affects resistance and reliability, how surface treatment affects long-term stability.
The technical challenges for this architecture span multiple scales. At the materials level, you'll work with epitaxial growth partners or internal capabilities to optimize layer structures, doping profiles, and interface quality. At the device level, you'll design contact schemes, mesa isolation, field plates, and passivation layers that together determine device performance. At the characterization level, you'll develop test structures and measurement techniques that reveal device behavior across the operating envelope — from cryogenic to elevated temperatures, under radiation exposure, over extended operational lifetime.
You'll collaborate with epitaxy partners on heterostructure development and material characterization, with process integration engineers on fabrication sequences and thermal budgets, with circuit designers on device specifications and models they need, with the device physics team on understanding radiation effects and degradation mechanisms, with test facilities when devices require harsh-environment characterization. You'll spend time in cleanroom fabrication, time measuring device characteristics using parameter analyzers and specialized test equipment, time analyzing material properties using structural and electrical characterization techniques, and time developing device models that circuit designers can use.
The work combines fundamental device physics with hands-on fabrication and characterization. You need to understand carrier transport in 2DEG systems, polarization effects in III-nitride heterostructures, and contact formation mechanisms. You'll develop novel device structures when standard approaches don't meet performance or reliability requirements, implement characterization techniques that reveal failure mechanisms, and iterate through fabrication-characterization-optimization cycles to achieve target specifications.
What we're looking for
- PhD or advanced degree in Electrical Engineering, Materials Science, or Applied Physics with hands-on experience developing HEMT devices or related heterostructure transistors.
- You've designed device structures, fabricated them in a cleanroom, characterized their electrical properties, and understood how structure affects performance.
- You're comfortable with III-V semiconductors, heterostructure physics, and the fabrication techniques used for compound semiconductor devices.
Experience specifically with GaN HEMTs, AlGaN/GaN or InAlN/GaN heterostructures is highly valuable — you understand the material systems we're working with. If you've worked on high-temperature electronics, radiation-hardened devices, or extreme environment applications, you will understand the additional challenges you’ll be addressing in your role. Familiarity with epitaxial growth (MOCVD, MBE), contact metallization, surface passivation, and reliability physics helps you make informed device design decisions. Strong experimental skills and comfort with device characterization equipment are essential.
We're looking for someone who combines deep physics understanding with hands-on device development skills, who can move between materials-level considerations and device-level performance, and who maintains systematic approach to optimization even when working with complex multi-parameter spaces.
What we offer
As an early team member, you'll shape capabilities and systems with first-order consequences for the future and direction of humanity's enterprise.
This is accompanied by a strong equity package, competitive base salary, and comprehensive benefits including enhanced healthcare coverage for you and your family, robust family planning support, life insurance, flexible time off and paid holidays, retirement plans with matching, daily meals at our headquarters, and relocation support.
Our primary operational base is set in the Bay Area, and our labs are headquartered in a part of the city set beside cypress groves and coastal trails. Think natural light, fresh ocean air, and panoramic views. We work intensely but deliberately invest in removing avoidable frictions from your life so you can dedicate maximum bandwidth to your core work.
If we make you an offer, we will work hard to get you onto our team and can even sponsor visas and green cards once eligible.
We strongly encourage you to apply even if you feel you don't meet every qualification or attribute as described. We care more about evidence of strong ability and a high signal-to-noise ratio.
Role details
- Category: Device Physics & Characterization
- Role: Wide-Bandgap Device Engineer
- Work type: On-site
- Employment: Full-time
- Location: Bay Area, California
- Salary range: $180,000 - $260,000