About SLM
SLM is a compute infrastructure company building supercapability systems. We're developing new classes of high-performance architectures that deliver advanced performance, precision, and physical resilience in environments conditioned by extreme physics. Many of our operating conditions are where conventional computing fails: ionization fields that destroy standard electronics, temperature extremes, and power constraints that demand every design decision be justified.
Our first-generation systems target advanced performance in some of the most challenging physical environments. We have a compressed timeline to execute deployment-ready systems, with hard deployment windows that won't reopen for years or close for more than a decade. We’re focused on optimizing these architecture platforms for sustained throughput in deterministic, real-time environments where a single error can invalidate months of data collection, gathered tactical provisions, and deployment certainties. This means fundamental architectural decisions about how processing elements coordinate, how memory hierarchies balance performance against difficult physical conditions, and how heterogeneous dies communicate across advanced packaging.
We are operating on a compressed timeline with high-stakes execution. Our principal architecture has been specified and designed over three years of applied R&D, and now we're strengthening design, integration, production, and qualification to deliver deployment-ready systems. You'll work on problems most engineers never encounter — advanced process nodes with the constraints of physically-resilient advanced materials, new high-performance memory technologies that require proprietary foundry fabrication methods, and integration challenges that need to be adapted for platform scalability and varying fixed SWaP specifications.
About this role
You'll define the technical foundation for computing systems that need to survive and perform in environments that destroy conventional electronics: ionization fields orders of magnitude beyond Earth's magnetosphere, temperature extremes, and power constraints that make every milliwatt count.
This means making architectural decisions that ripple through every layer of the system: how processing elements coordinate, how memory hierarchies balance speed against ionization-particle tolerance, how heterogeneous dies communicate across interposers, and how software compilation maps to silicon capabilities. You're the person who sees the whole system and makes the hard calls about where to spend transistors, where to accept latency, and which internal hero technology bets are ready for integration and production deployment.
You'll work directly with foundry partners on what's actually manufacturable at advanced nodes with specialized device physics constraints. You'll collaborate with memory technology providers to integrate mixed-precision devices that haven't been used this way before. You'll sit with the compiler team to ensure the architecture they're targeting is actually the one we need to be building. And you'll be the technical authority when cross-functional conflicts arise — such as when the packaging team needs more area, when the software team requires different memory semantics, when the customer needs to operate capabilities we didn't plan for or computational complexity they do not know how to utilize.
Our timeline is compressed. We're building first-generation systems for near-term deployment. At times, you'll have to make architecture decisions with incomplete information, validate them through rapid prototyping, and adjust course when testing reveals what the models missed. You need experience shipping complex silicon to production, not just publishing papers about what might work given certain parameters and integration implications.
What we're looking for
- PhD in Computer Architecture, Electrical Engineering, or equivalent depth from building production systems preferred.
- You've led architecture for processors, accelerators, or reconfigurable systems that have shipped.
- You understand the physics that constrains what's possible at advanced process nodes.
- You can move between high-level system modeling and transistor-level implications.
- You've worked closely with foundries, IP vendors, or assembly partners on technology that didn't exist in a standard library.
Experience with either domain-specific acceleration, spatial computing, dataflow architectures, production silicon, advanced packaging systems, optimized memory hierarchies, or high-reliability electronics is particularly relevant. If you’ve been part of leading semiconductor teams, aerospace systems, national laboratories and scientific instrumentation, or other extreme-reliability applications, you'll be able to recognize the constraints under which you’ll need to operate in this role.
You need to be comfortable making technical decisions that affect the entire company's direction, comfortable interfacing with different complex hardware development programs, and comfortable changing course when new information demands it.
What we offer
As an early team member, you'll shape capabilities and systems with first-order consequences for the future and direction of humanity's enterprise.
This is accompanied by a strong equity package, competitive base salary, and comprehensive benefits including enhanced healthcare coverage for you and your family, robust family planning support, life insurance, flexible time off and paid holidays, retirement plans with matching, daily meals at our headquarters, and relocation support.
Our primary operational base is set in the Bay Area, with our labs headquartered in a part of the city set beside cypress groves and coastal trails. Think natural light, fresh ocean air, and panoramic views. We work intensely but will invest heavily in removing avoidable frictions from your life so you can dedicate maximum bandwidth to your core work.
If we make you an offer, we will work hard to get you onto our team and can even sponsor visas and green cards once eligible.
We strongly encourage you to apply even if you feel you don't meet every qualification or attribute as described. We care more about evidence of strong ability and a high signal-to-noise ratio.
Role details
- Category: Architecture & System Integration
- Role: Platform Architect, SoC
- Work type: On-site
- Employment: Full-time
- Location: Bay Area, California
- Salary range: $250,000 - $350,000